1. Technical Field
This disclosure relates to clock tree synthesis (CTS). More specifically, this disclosure relates to dynamic power driven CTS.
2. Related Art
CTS refers to the process of creating a clock distribution network (or clock tree) for distributing a clock signal to a set of clock sinks (e.g., clock inputs of sequential circuit elements) in a circuit design. A clock sink can generally refer to any circuit element to which a clock signal is provided, and a sequential circuit element can generally refer to any circuit element that is timed using a clock signal. A “D flip-flop” is an example of a sequential circuit element. A circuit design may include multiple clock domains, and each clock domain can include multiple clock trees. Clock trees can consume a significant amount of dynamic power. Hence, what are needed are systems and techniques for CTS that create clock trees that consume less dynamic power.